Microchip, via its Microsemi subsidiary, today announces its Smart Embedded Vision initiative that provides solutions for designing intelligent machine vision systems with Microchip’s low-power PolarFire® Field Programmable Gate Arrays (FPGAs). With today’s announcement, Microchip extends its high-resolution smart embedded vision FPGA offerings with new enhanced high-speed imaging interfaces, an intellectual property (IP) bundle for image processing and an expanded partner ecosystem.
As compute-intensive, vision-based systems are increasingly integrated at the network edge, FPGAs are quickly becoming a preferred flexible platform for next-generation designs. In addition to requiring high bandwidth processing capabilities, these intelligent systems are deployed in small form factors with tight thermal and power constraints.
The Smart Embedded Vision initiative provides a suite of FPGA offerings that includes IP, hardware and tools for low-power, small form factor machine vision designs across the industrial, medical, broadcast, automotive, aerospace and defence markets.
With the launch of the initiative, Microchip has added the following to further address design requirements for intelligent vision systems:
PolarFire FPGAs offer 30 to 50 percent lower total power over competing Static Random-Access Memory (SRAM)-based mid-range FPGAs. With family members ranging from 100K to 500K Logic
Elements (LEs), they provide five to 10 times lower static power, making them ideal for a new range of compute-intensive edge devices, including those deployed in thermally- and power-constrained environments.
In addition to new high-speed imaging IP cores and the PolarFire Imaging IP bundle, a new MIPI-CSI2-based machine learning camera reference design is available for smart embedded system implementations. Based on the PolarFire FPGA imaging and video kit that uses inference algorithms from Microchip partner ASIC Design Services, the reference design is free for customers to evaluate.
All Smart Embedded Vision solutions are supported by the Libero® SoC Design Suite, Microchip’s comprehensive development tool.
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