FMC Developments Support Legacy and Next-Gen Data Needs

While FMC celebrated its 10th anniversary this year, it continues to provide a variety of benefits to the embedded system developer.  These include sustained implementation and deployment in new technologies.  Additionally, the release of FMC+ provides improved design capabilities.  However, with data rates always on the rise and shrinking form factors, the question arises, why does FMC continue to be so popular and what has sustained it over the years?

With its ability to de-risk designs while cutting costs, Field Programmable Gate Array (FPGA) technology has allowed for more efficient design within the embedded marketspace. Often acting as an all-in-one solution, FPGAs negate the need for ASIC technology and reduce the cost of custom IP algorithms in silicon. Even during post-processing, FPGAs allow engineers to modify their logic after silicon is on the board. The results allow for more efficient prototyping and a faster time to market.

One of the biggest benefits to using FPGAs can also prove to be one of the biggest challenges.  When diverse flexibility of an FPGA meets the demands of end users for a specific configuration, the interface layout could drag on indefinitely. COTS manufacturers are presented with an additional challenge to design a standard product that will please most of the market.

If FPGA technology was to be a viable product for a mass market while still offering modularity, a different approach was needed in standard development.  With the culmination of system developers and connector manufacturers, the VITA Standards Organization, or VITA, had the means to drive such a standard, and FMC was born with VITA 57.1.

While the FMC Standard has been in existence for over 10 years, it continues to be in high demand by a wide variety of COTS manufacturers and FPGA developers such as Abaco and Xilinx. Many adopters of FMC are attracted to features such as its small form factor and user-defined pins on the connector.  FMC balances useful features designed to aid the end user while providing reliable I/O signal integrity at speeds up to 14Gb/s.

The original intent behind FMC proves to be both a blend of ingenuity in design and necessity within the embedded community.

While FMC is still readily used in current and legacy designs, growing data rates and the fundamentals of Moore’s Law demanded an interface that could handle improved performance.  The answer came in the form of VITA 57.4 FMC+, which was ratified and published through ANSI in July 2018.  FMC+ was designed to expand upon the already popular FMC standard while avoiding the hassle of implementation into existing systems.

FMC+ provides improved performance, faster data rates, and additional I/O, while utilizing the same footprint as FMC.  Along with backwards compatibility with legacy FMC systems, FMC+ proves to be a stress-free improvement for any FPGA developer already using FMC.

These improvements are due to a new high-speed connector array offered in a 14×40 configuration.  When comparing this to legacy FMC, FMC+ offers 160 more pins, increases multi-gigabit interfaces from 10 to 24 MGTs, and supports the latest FPGA silicon with data rates up to 28Gbaud in each direction.  As an additional offering, FMC+ also supports the addition of an optional 4×20 array supporting up to 8 additional multi-gigabit interfaces yielding 32MGTs.

FMC+ is due to follow FMC in becoming widely adopted due to its small form factor and design flexibility.  One of the most efficient features FMC+ boasts is its backwards compatibility.  This allows legacy FMC mezzanines to be mated to FMC+ carriers.  As a result, FMC+ proves to be invaluable to system designers who may not control both halves of the connector.  This enables seamless integration of different mezzanines into their current designs.

As FPGA technologies are used on a broader scale, FMC+ applications continue to grow.  While FMC+ may be primarily used as an enabling technology of next generation rapid prototyping and development, many other applications are available for FMC+ deployment, especially in the context of VITA.

One of the most popular standards within VITA, VPX utilizes a wide variety of VITA technologies with slot profiles and chassis assemblies.  This includes FMC and FMC+.  VPX Plug-In modules are frequently adapted for particular I/O needs using mezzanine cards, thus the addition of FMC+.

Beyond the realm of VITA Standards, FMC continues to gain traction in every aspect of embedded hardware.  From space stations to ruggedized sub-systems, FMC deployment provides flexible and attractive features to those constructing full system architectures as well as COTS products.

FPGA-based technologies should also see adoption in software defined radio, optics, and advanced sensor/radar applications. Improvements that FMC+ offers such as more bandwidth, more channels, and a more complete solution are shared by all of these industries.  With its higher data rates and cost-effective approach, system developers can have confidence that FMC+ will excel in these areas.

Despite the growing list of accomplishments taking place within VITA, the work within the FMC family of Standards is not yet done.  Several projects are ongoing that will continue to improve upon this widely used development standard.

To better synchronize the two standards, the Technical Work Group responsible for FMC+ is currently finalizing the revision of VITA 57.1 FMC.  This is in line with ANSI procedure to revalidate a Standard for accuracy every 5 years.

The result of the FMC revision efforts has led to improvements in figures, tables, and general document layout.  Some of the more substantive changes include the addition of a larger EEPROM as well permissions to RF FPGA developers regarding ground usage.

Once this revision is approved and ratified by ANSI, the Technical Work Group will begin the VITA 57.5 Study Group entitled “Physical Tools to Aid FMC+ Development”.  This project includes: FMC+ cable assemblies, loopback cards for FPGA development, and jackscrew standoffs to ease separation of high pin count applications.

One final aspect the group would like to address is with regards to analysis and simulation tools that would make selecting compatible hosts and modules easier for system integrators.  VITA 57.2 and 57.3 would embody these efforts.

The combined FMC family of Standards will continue to evolve around developments in FPGA technology providing improved design tools and a faster time to market.

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VITA backlink: https://www.linkedin.com/groups/2450735