To meet ever-growing performance demands, servers and processors have ratcheted up their compute power—and power consumption—with multicore chips. This next-generation power architecture aims to significantly cut wasted power inside datacenter servers and it also meets the requirements of the new 48V architecture announced by Google.
ST has implemented direct digital power conversion from 48V by developing a family of ICs to support the complete range of datacenter power-conversion applications. The direct digital power conversion eliminates intermediate conversion stages to minimize power loss in datacenters from power distribution and reduce space, cooling requirements, and cost. The ICs are fully compliant with Intel’s VR12.5 (Haswell and Broadwell), VR13 (Skylake) and DDR3/4 voltage-regulation specifications, and all FPGAs and ASICs for datacenter applications. The three new chips, together with ST’s low-voltage StripFETTM power-MOSFET family, assure robust and highly-efficient system operation at input voltages from 36 to 72V, with output voltages between 0.5 and 12V. These specifications confirm best-in-class power efficiency of >97% at 12V/500W and high system bandwidth using minimal PCB space.
“This 48V architecture is ideal for ultra-high-efficiency datacenters in significantly reducing the total cost of ownership,” said Matteo LoPresti, Group VP and General Manager Analog, STMicroelectronics. “ST is already in volume production and supporting this next-generation application with our unique isolated resonant-power converters, demonstrating that this solution offers industry-leading power efficiency, along with outstanding scalability, and flexibility.”
The three ICs are available now and ST offers a demo board to showcase the advantages of the 48V architecture and its three-chip solution. For more information, please contact your local STMicroelectronics sales representative.
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