, Ultralow Jitter Clock Distribution Solution Combines  EZSync Multichip Synchronization

Ultralow Jitter Clock Distribution Solution Combines EZSync Multichip Synchronization

MILPITAS, CA – November 23, 2015 – Linear Technology Corporation introduces the LTC6954, a family of ultralow jitter 1.8GHz clock distribution chips with three independent outputs, each with its own divider and phase delay. With less than 20fsRMS additive jitter over the 12kHz to 20MHz bandwidth, the LTC6954 minimizes the amount of introduced noise while dividing and distributing its input clock. This enables the LTC6954 to deliver the low jitter clocks necessary to achieve optimum signal-to-noise ratios (SNR) when driving high resolution data converters. Low jitter ADC clocking, for instance, is especially crucial when digitizing high analog frequencies such as RF or high IF signals, making the LTC6954 the ideal clocking solution in such systems.

The LTC6954 family includes four versions, offering various combinations of LVPECL and LVDS/CMOS output logic drives. This provides the flexibility to optimally connect to a large number of devices accepting different logic signals. Powered from a single 3.3V supply and programmed through SPI, the LTC6954 independently divides the input clock by any integer between 1 and 63, and also provides the capability to independently delay each of its outputs by 0 through 63 input clock cycles. This facilitates the creation of phase-shifted clocks necessary, for instance, for driving the ADCs (analog-to-digital converters) of the I- and Q-channels in communications systems.

In addition to its capability as an independent clock distributor, the LTC6954 features Linear Technology’s propriety EZSync™ synchronization method. Triggered by a simple pulse, EZSync synchronization aligns the rising edges of multiple outputs from one or multiple chips to produce repeatable and deterministic phase relationships between all clock divider outputs. The LTC6954 can pair up with the LTC6950 as a follower to expand the number of low jitter edge-aligned clock outputs generated by the LTC6950.

The LTC6954 is specified over the full operating junction temperature range of -40°C to 105°C and is offered in a 4mm x 7mm, 36-lead plastic QFN package. It is available in production, with pricing starting at $7.50 each in 1,000-piece quantities. Samples and demo boards may be requested by visiting www.linear.com/product/LTC6954 or by contacting your local Linear Technology sales office.

Summary of Features: LTC6954

  • Low Noise Clock Distribution Suitable for High Speed/High Resolution ADC Clocking
  • Additive Jitter < 20fsRMS (12kHz to 20MHz)
  • Additive Jitter < 85fsRMS (10Hz to Nyquist)
  • 1.8GHz Maximum Input Frequency (LTC6954-1 When DELAY = 0)
  • 1.4GHz Maximum Input Frequency (LTC6954-1 When DELAY > 0, LTC6954-2, -3, -4)
  • EZSync™ Clock Synchronization Compatible
  • Three Independent, Low Noise Outputs
  • Four Output Combinations Available
  • Three Independent Programmable Dividers Covering All Integers from 1 to 63
  • Three Independent Programmable Delays Covering All Integers from 0 to 63
  • -40°C to 105°C Junction Temperature Range

The USA list pricing shown is for budgetary use only. International prices may differ due to local duties, taxes, fees and exchange rates.

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